9852 数字频率合成器

Description

9852 数字频率合成器

特性
300 MHz 内部时钟频率
FSK、BPSK、PSK、线性调频、AM 操作
双集成式 12 位数模转换器
超高速比较器、3 ps rms 抖动
出色的动态性能
100 MHz (±1 MHz) AOUT时 SFDR 为 80 dB
4× 至 20× 可编程基准时钟倍频器
双 48 位可编程频率寄存器
双 14 位可编程相位偏移寄存器
12 位可编程幅度调制和开/关输出形状调整键控功能
单引脚 FSK 和 BPSK 数据接口
通过 I/O 接口提供 PSK 功能
具有单引脚频率保持功能的线性或非线性 FM 调频功能
频率斜升 FSK
在时钟发生器模式下总抖动 <25 ps rms
自动双向扫频
Sin(x)/x 校正
简化的控制接口
兼容 SPI 的 10 MHz 串行 2 线或 3 线
100 MHz 并行 8 位编程
3.3 V 单电源
多种关断功能
单端或差分输入基准时钟
具有裸焊盘的小外形 80 引脚 LQFP 或 TQFP 封装

9852数字频率合成器是一款高度集成的套件，该套件使用高级 DDS 技术，外加内部高速、高性 数字频率合成器是一款高度集成的套件，该套件使用高级 DDS 技术，外加内部高速、高性能数模转换器，构成可数字化编程的捷变频频率合成器功能。在以精确时钟源为基准时，9852 可生成高度稳定的频率、相位和幅度可编程余弦输出，在通信、雷达和许多其他应用中用作捷变 LO。9852的创新型高速 DDS 内核提供 48 位频率分辨率（使用 300 MHz SYSCLK 时，调谐分辨率为 1 μHz）。为相位-幅度转换保持 16 位分辨率可确保出色的无杂散动态范围 (SFDR)。

9852 的电路架构允许以高达 150 MHz 的频率生成输出信号，并且能够以高达每秒 1 亿次的新频率对这些输出信号进行数字化调谐。可以针对捷变时钟发生器应用，通过内部比较器将（外部滤波的）余弦波输出转换为方波。此套件提供两个 14 位相位寄存器和单个引脚用于 BPSK 操作。

对于更高阶的 PSK 操作，可以将 I/O 接口用于相变。12 位余弦 DAC 与创新型 DDS 架构结合后，可以提供出色的宽带和窄带输出 SFDR。在配置有比较器的情况下，12 位控制 DAC 有助于在高速时钟发生器应用中实现静态占空比控制。

12 位数字倍频器允许对余弦 DAC 输出进行可编程幅度调制、开/关输出形状调整键控和精密幅度控制。还针对宽带宽扫频应用包括了线性调频功能。9852 可编程 4× 至 20× REFCLK 倍频器电路可在内部从较低频率的外部基准时钟生成 300 MHz 的系统时钟。这可省去用户实施 300 MHz 系统时钟源的费用和困难。

直接 300 MHz 时钟还适应单端或差分输入。支持斜升 FSK 的单引脚传统 FSK 和增强频谱质量。9852 使用高级 0.35 μ CMOS 技术，在使用单一 3.3 V 电源的情况下提供这一高级功能。

9852 单音频率合成器之间具有引脚兼容性。9852 可在 −40°C 至 +85°C 的扩展工业温度范围内工作。

应用
捷变 LO 频率合成
可编程时钟发生器
用于雷达和扫描系统的 FM 线性调频源
测试与测量设备
商用和业余 RF 激励器

9852

9852 数字频率合成器

peculiarity
300 MHz internal clock frequency
FSK, BPSK, PSK, linear FM, AM operation
Dual integrated 12-bit digital-to-analog converter
Ultra high speed comparator, 3 ps rms jitter
Excellent dynamic performance
At 100 MHz (±1 MHz) AOUT, the SFDR is 80 dB
4× to 20× programmable reference clock doubler
Dual 48-bit programmable frequency registers
Dual 14-bit programmable phase shift register
12-bit programmable amplitude modulation and on/off output shape adjustment keying function
Single pin FSK and BPSK data interface
The PSK function is provided through the I/O interface
Linear or nonlinear FM frequency modulation with single-pin frequency holding
Frequency ramp up FSK
Total jitter <25 ps rms in clock generator mode
Automatic bidirectional frequency sweep
Sin(x)/x correction
Simplified control interface
10 MHz serial 2-wire or 3-wire compatible with SPI
100 MHz parallel 8-bit programming
3.3V single power supply
Multiple turn-off functions
Single ended or differential input reference clock
Small form factor 80 pin LQFP or TQFP package with bare pad

The 9852 Digital frequency synthesizer is a highly integrated kit that uses advanced DDS technology, plus internal high speed, high performance digital frequency synthesizer is a highly integrated kit that uses advanced DDS technology, plus internal high speed, high performance digital to analog converter, to form a digital programmable frequency synthesizer capabilities. When benchmarking against a precise clock source, the 9852 generates highly stable frequency, phase, and amplitude programmable cosine outputs for use as agile LO in communications, radar, and many other applications. The 9852’s innovative high-speed DDS core offers 48-bit frequency resolution (1 μHz tuning resolution when using 300 MHz SYSCLK). Maintaining 16-bit resolution for phase-to-amplitude conversion ensures excellent spury-free dynamic range (SFDR).

The 9852’s circuit architecture allows output signals to be generated at frequencies up to 150 MHz, and these output signals can be digitally tuned at new frequencies up to 100 million times per second. For agile clock generator applications, the (externally filtered) cosine wave output can be converted to a square wave by an internal comparator. This kit provides two 14-bit phase registers and a single pin for BPSK operations.

For higher order PSK operations, the I/O interface can be used for phase transitions. When combined with an innovative DDS architecture, the 12-bit cosine DAC provides excellent broadband and narrowband output SFDR. When configured with a comparator, a 12-bit control DAC facilitates static duty cycle control in high-speed clock generator applications.

The 12-bit digital frequency multiplier allows programmable amplitude modulation, on/off output shape adjustment keying, and precision amplitude control of the cosine DAC output. Linear frequency modulation is also included for wideband wide sweep applications. The 9852 programmable 4× to 20× REFCLK frequency multiplier circuit internally generates a 300 MHz system clock from an external reference clock at a lower frequency. This saves users the expense and difficulty of implementing a 300 MHz system clock source.

The direct 300 MHz clock also accommodates single-ended or differential inputs. Supports single-pin traditional FSK and enhanced spectrum quality with slant up FSK. The 9852 uses advanced 0.35μCMOS technology to deliver this advanced feature while using a single 3.3V power supply.

The 9852 single tone frequency synthesizers have pin compatibility. The 9852 can operate in an extended industrial temperature range from −40°C to +85°C.

Apply
Agile LO frequency synthesis
Programmable clock generator
FM linear FM source for radar and scanning systems
Test and measurement equipment
Commercial and amateur RF exciter